In construction of microelectronic devices, it is well known that there is a constant pressure for reduction of device size and/or increase of device capability at a given scale.
In the actual construction of reduced scale devices, attention must be paid to higher precision in configuring the materials from which the device components are formed. Attention must also be paid to the interaction of the various materials used in device construction during the device manufacture process, during device testing, and during device operation. In this regard, finer sized device components are more sensitive to adverse materials interactions since the amount of material forming the component is smaller. For example, an interaction that might have only affected the border area of a large component would affect an entire component of smaller scale (e.g., where the scale of the smaller component is the same size as the border area of the larger component). Thus, reduction in component scale forces consideration of materials interaction problems which could have been viewed as non-critical for larger scale components.
In the context of devices such as deep trench capacitors in semiconductor substrates, various materials are used to form the components of the capacitor such as the capacitor plates (electrodes), the dielectric barrier between electrodes, oxide collar structures to prevent or minimize parasitic effects, surface or buried straps to provide contact between the capacitor and the other circuitry of the device, etc. For example, the electrode in the trench is typically a highly doped polycrystalline silicon (polysilicon) material, the buried or surface strap is typically an amorphous silicon, and the semiconductor substrate is a monocrystalline silicon. The successful functioning of the capacitor depends in part on the ability of these diverse materials to maintain their original or desirably modified character during manufacture/useful life of the device.
Unfortunately, the nature of these materials is such that unwanted interactions may occur unless otherwise prevented. For example, the dopant in the polysilicon electrode may diffuse out into the monocrystalline silicon to an undesirable degree leading to compromise of the device performance (e.g., a deep junction effect). This constraint limits the amount of doping that can be employed in the trench electrode which in turn may itself limit the performance of the capacitor (e.g., increased series resistance, decreased charge storage capacity, etc.).
Furthermore, as the minimum lithographically definable feature size, F, is reduced with each successive generation of DRAM product, the cross-sectional area of the storage trench capacitor rapidly decreases. Since the series resistance/per unit depth of the conductive fill of the storage trench capacitor increases as 1/F.sup.2, it is critical to memory cell performance that ways to reduce the resistivity of the trench capacitor fill material be sought. Such reduction in series resistance must also be compatible with the other portions of the memory cell (i.e. must be able to withstand processing conditions without deterioration or contamination to other portions).
Thus, there is a desire for improved trench electrode structures which allow better control of materials interactions to enable construction of reliable reduced scale devices. It is also desired to meet these needs in an economical manner that minimizes or avoids compromise of other device or component properties.